1. Field of the Invention
The present invention relates to a semiconductor memory device in which the selective operation of a memory cell block selected from a plurality of memory cell blocks can be carried out. The device according to the present invention is applicable to, for example, a dynamic random access memory.
2. Description of the Related Arts
In the prior art semiconductor memory device, a memory cell array is sometimes constituted by a plurality of memory cell blocks.
In such device, it is possible to keep the memory cell blocks which do not include the selected word line in the inactive state so that the consumption of electric power of the device is reduced.
However, in the above-described prior art device, only some of the memory cell blocks are kept in the inactive state due to a non-selection thereof, and the clock generator which is provided in common for the plurality of memory cell blocks is always in operation to supply clock signals such as word line activation clock signal to all of the plurality of memory cell blocks. Hence, the reduction of the electric power consumption is not satisfactorily attained in such a prior art device.
Particularly, in a large capacity semiconductor memory device having a chip size of the order of 10 mm.sup.2 or more, the length of the wiring for transmitting clock signals becomes large, and accordingly, the parasitic capacitance of the wiring becomes large, so that a high speed operation of the device is difficult to attain. Also, the consumption of electric power becomes large, and an IR drop caused by the resistance of the wiring becomes significant.